Jump to content

Cache line: Revision history

Diff selection: Mark the radio buttons of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

3 July 2026

  • curprev 07:3907:39, 3 July 2026 SanzSkuy talk contribs 11,445 bytes 0 No edit summary
  • curprev 07:3707:37, 3 July 2026 SanzSkuy talk contribs 11,445 bytes +11,445 Created page with "'''Cache line''' adalah unit transfer data terkecil antara cache CPU dan memori utama (RAM). Setiap kali CPU butuh data — walaupun cuma 1 byte — yang diangkut dari RAM bukan 1 byte itu saja, melainkan '''satu blok penuh''' berukuran tetap, umumnya '''64 byte''' pada CPU x86 modern (Apple M-series memakai 128 byte). Konsep ini kelihatan sepele, tapi hampir semua trik optimasi performa di HPC — mulai dari layout data SoA, loop ordering, cache blocking..."
Retrieved from "https://wiki.haidhi.my.id/wiki/index.php/Cache_line"